2 Timing Sample

A fixed sample of images was randomly selected from FRIFTE E1N datasets. The sample was used to assess whether an implementation adheres to the computational speed requirements from the FRIFTE E1N Test Plan. These values are chosen in such a way that allows the implementation flexibility while allowing NIST to complete the evaluation in a reasonable amount of time. If an implementation exceeds the maximum allowable duration, the participant will be asked to reduce the processing time of their software prior to NIST completing the evaluation. As such, all published FRIFTE E1N submissions conform to the published speed requirements.

2.1 Processor Details

All measurements in this section were performed on a machine equipped with Intel Xeon Gold 6254 Central Processing Units (CPUs). Each CPU features a 3.10 GHz base frequency and 24.75 MB of cache. Timing tests are all single threaded—implementations are not permitted to use more than one CPU core during any function measured here. As such, these values can be used to understand expected scaled performance. NIST testing code embraces the single-threaded nature of implementations to fork processes during other non-timed portions of this evaluation, allowing participants to write thread-unsafe code while still using NIST resources to their maximum efficiency. This CPU supports executing several families of processor intrinsic functions, including AVX-5121.

2.2 Composition

Table 2.1 shows the quantity of each type of fingerprint record comprising the Timing Sample, along with the maximum allowable feature extraction time permitted by FRIFTE E1N for that type of record.

Table 2.1: Number of records of each generalized finger position combinations comprising the Timing Sample, along with the maximum allowable feature extraction time for that type of record.
Template Type Description Image Quantity Maximum Duration (s) Record Quantity
Probe Left Index (Plain) 1 3 1 000
Right Index (Plain) 1 3 1 000
Left + Right Index (Plain) 2 6 1 000
Left Slap 1 12 1 000
Right Slap 1 12 1 000
Left + Right Slap 2 24 1 000
Identification Flats 3 30 1 000
Ten Fingers (Plain) 4 30 1 000
Ten Fingers (Roll) 10 30 1 000
Reference Left + Right Index (Plain) 2 6 1 000
Identification Flats 3 30 1 000
Ten Fingers (Plain) 4 30 1 000
Ten Fingers (Roll) 10 30 1 000

2.3 Feature Extraction

Features were extracted from all images depicted in Table 2.1 and stored in templates.

2.3.1 Template Creation Duration

Table 2.2 shows the distribution of template creation durations in seconds for templates created from the Timing Sample. Failures of any kind reported during template generation are included.

Table 2.2: Duration of template creation for the Timing Sample, in seconds.
Template Type Description Minimum 25% Median Mean 75% Maximum Failures API Max
Probe Left Index (Plain) 0.2 0.3 0.3 0.3 0.3 0.5 0 3
Right Index (Plain) 0.2 0.3 0.3 0.3 0.3 0.5 0 3
Left + Right Index (Plain) 0.5 0.6 0.6 0.7 0.7 1.0 0 6
Left Slap 0.1 1.3 1.4 1.3 1.6 2.2 0 12
Right Slap 0.1 1.3 1.4 1.4 1.6 2.1 0 12
Left + Right Slap 0.2 2.6 2.8 2.7 3.1 4.4 0 24
Identification Flats 1.0 3.4 3.8 3.7 4.1 5.6 0 30
Ten Fingers (Plain) 1.1 3.8 4.2 4.0 4.5 5.6 0 30
Ten Fingers (Roll) 3.1 7.0 7.9 8.0 8.8 13.3 0 30
Reference Left + Right Index (Plain) 0.5 0.6 0.7 0.7 0.7 1.0 0 6
Identification Flats 1.1 3.5 3.8 3.8 4.1 5.7 0 30
Ten Fingers (Plain) 1.2 3.8 4.2 4.1 4.5 6.4 0 30
Ten Fingers (Roll) 4.2 7.3 8.1 8.2 8.9 13.4 0 30

2.3.2 Template Size

Table 2.3 shows the distribution of sizes of templates, exclusive of when tech5impl+0005 indicated a failure.

Table 2.3: Template size summary statistics in kB for the Timing Sample.
Template Type Description Minimum 25% Median Mean 75% Maximum Failures
Probe Left Index (Plain) 1.4 2.3 2.6 2.6 2.9 4.4 0
Right Index (Plain) 1.6 2.3 2.6 2.6 2.9 4.1 0
Left + Right Index (Plain) 3.1 4.7 5.2 5.3 5.8 8.2 0
Left Slap 0.0 9.2 10.6 10.0 12.0 19.7 0
Right Slap 0.0 9.2 10.6 10.1 11.9 17.7 0
Left + Right Slap 0.0 18.4 21.0 20.1 23.5 37.4 0
Identification Flats 4.6 25.4 28.6 27.8 31.6 50.5 0
Ten Fingers (Plain) 6.0 26.0 30.3 29.1 33.6 48.2 0
Ten Fingers (Roll) 28.6 52.3 59.6 60.2 67.4 100.1 0
Reference Left + Right Index (Plain) 3.1 4.9 5.4 5.4 6.0 8.3 0
Identification Flats 5.2 25.8 28.7 28.8 31.8 54.2 0
Ten Fingers (Plain) 1.6 26.3 30.1 29.4 33.4 47.6 0
Ten Fingers (Roll) 27.8 53.1 60.0 60.9 68.1 114.8 0

2.4 Enrollment Database

Reference templates are combined into a participant-defined database structure for optimal searching.

While the participant-defined enrollment database should contain information about all references, the space consumed by the enrollment database may be significantly different than the space consumed by concatenation of all individual reference templates. Additionally, the participant-defined database structure may be a structure unique for this evaluation and not necessarily similar to a structure deployed operationally. The sum of sizes for both types of reference storage are shown in Table 2.4 along with the difference between the two, for the various enrollment databases generated as part of the Timing Sample dataset.

The Templates column is computed by summing the buffer size returned by the createTemplate() API function. The Database column is computed by recursively summing the file sizes (as determined by the stat() syscall) of all files remaining in the database directory after returning from the createEnrollmentDatabase() API function.

Table 2.4: Sum of sizes of all reference templates in the Timing Sample dataset, the size needed when those templates are stored in a proprietary enrollment database, and the difference between the two, in GB.
Database Contents Records Templates Database Δ
Left + Right Index (Plain) 100 000 0.6 0.6 0.0
Left + Right Index (Plain) 1 600 000 8.6 8.7 0.1
Identification Flats 3 000 000 88.6 88.8 0.2
Ten Fingers (Plain) 5 000 000 148.7 148.9 0.3
Ten Fingers (Roll) 5 000 000 305.3 305.6 0.3

  1. The complete set of advertised CPU flags is fpu, vme, de, pse, tsc, msr, pae, mce, cx8, apic, sep, mtrr, pge, mca, cmov, pat, pse36, clflush, dts, acpi, mmx, fxsr, sse, sse2, ss, ht, tm, pbe, syscall, nx, pdpe1gb, rdtscp, lm, constant_tsc, art, arch_perfmon, pebs, bts, rep_good, nopl, xtopology, nonstop_tsc, cpuid, aperfmperf, pni, pclmulqdq, dtes64, monitor, ds_cpl, vmx, smx, est, tm2, ssse3, sdbg, fma, cx16, xtpr, pdcm, pcid, dca, sse4_1, sse4_2, x2apic, movbe, popcnt, tsc_deadline_timer, aes, xsave, avx, f16c, rdrand, lahf_lm, abm, 3dnowprefetch, cpuid_fault, epb, cat_l3, cdp_l3, invpcid_single, intel_ppin, ssbd, mba, ibrs, ibpb, stibp, ibrs_enhanced, tpr_shadow, vnmi, flexpriority, ept, vpid, ept_ad, fsgsbase, tsc_adjust, bmi1, avx2, smep, bmi2, erms, invpcid, cqm, mpx, rdt_a, avx512f, avx512dq, rdseed, adx, smap, clflushopt, clwb, intel_pt, avx512cd, avx512bw, avx512vl, xsaveopt, xsavec, xgetbv1, xsaves, cqm_llc, cqm_occup_llc, cqm_mbm_total, cqm_mbm_local, dtherm, ida, arat, pln, pts, pku, ospke, avx512_vnni, md_clear, flush_l1d, arch_capabilities↩︎