.. _fabrication:

Fabrication steps
=================

These images illustrate each step. The top panels are side view and bottom are top view.

Start with SOI wafer

.. image:: process_images/olmc_flowImages_01-si.png
    :width: 70%

Deposit protective oxide

.. image:: process_images/olmc_flowImages_02-protectiveSiO2.png
    :width: 70%

Implant dopants for P-Si, N-Si, and W-centers. Anneal

.. image:: process_images/olmc_flowImages_03-dopants.png
    :width: 70%

Strip protective oxide and dep SiN etch stop

.. image:: process_images/olmc_flowImages_04-barrierSiN.png
    :width: 70%

Liftoff TiAu small pads for superconductor contacts

.. image:: process_images/olmc_flowImages_05-WSiContact.png
    :width: 70%

Deposit and pattern WSi superconductor

.. image:: process_images/olmc_flowImages_06-WSi.png
    :width: 70%

Deposit hTron spacer oxide

.. image:: process_images/olmc_flowImages_07-hTronOxideSpacer.png
    :width: 70%

Lifto􏰀ff resistor layer

.. image:: process_images/olmc_flowImages_08-resistor.png
    :width: 70%

Partial etch for LEDs and waveguides

.. image:: process_images/olmc_flowImages_09-partialEtch.png
    :width: 70%

Full etch for waveguides

.. image:: process_images/olmc_flowImages_10-fullEtch.png
    :width: 70%

Deposit TiAu small pad for LED contacts

.. image:: process_images/olmc_flowImages_11-LEDContact.png
    :width: 70%

Deposit sidewall insulator

.. image:: process_images/olmc_flowImages_12-sidewallInsulator.png
    :width: 70%

Etch vias to superconductor and LED pads

.. image:: process_images/olmc_flowImages_13-via.png
    :width: 70%

Deposit TiAu wiring layer

.. image:: process_images/olmc_flowImages_14-metal.png
    :width: 70%

Deposit top cladding

.. image:: process_images/olmc_flowImages_15-cladding.png
    :width: 70%

Etch vias to wirebond pads

.. image:: process_images/olmc_flowImages_16-padOpen.png
    :width: 70%